1. Field of the Invention
The present invention relates to a semiconductor memory device.
Priority is claimed on Japanese Patent Application No. 2008-279745, filed Oct. 30, 2008, the content of which is incorporated herein by reference.
2. Description of Related Art
A semiconductor memory device comprising a sub-amplifier which amplifies a signal of a sense amplifier is well known. In such a semiconductor memory device comprising a sub-amplifier, a control signal of a sub-amplifier circuit is input from the direction of column decoder in order to easily match the timing of the control signal to that of a column selection signal (refer to Japanese Unexamined Patent Application, First Publication, No. H11-214652). Patent Document 1 discloses that matching the timing between a control signal DREADT of the sub-amplifier circuit and a column selection signal YS is easier when the control signal DREADT of the sub-amplifier circuit is input from the side of a column decoder region 3.